Detail of the student project

List
Topic:VHDL design of the impulse generator
Supervisor:Radek Sedláček
Announce as:PTO
Description:Familiarise with the general principle of generating pulses on the FPGA circuits.
Main goal of this project is development a a pulse generator with nanosecond resolution. Solution to use FPGA. The parameters of the output signal is as follows: repetition frequency is adjustable in the range 10 MHz to 100 MHz, the pulse width can be set in the range of 1 to 20 ns with a step of 0.1 ns. Use VHDL language For synthesis.

The topic is suitable for the students which have a basic knowledge of VHDL language.

The project can be divided into following stages:
1/ theoretical study of the problem - select proper method for implementation
2/ hardware platform specification according the requirements
3/ implementation of one method of pulses generation in VHDL
4/ verification and testings on real hardware - measurement a final parameters
5/ documentation & report

There are available a various evaluation boards for FPGA INTEL (Altera) and QUARTUS IDE.

Date:20.02.2017
Max.number of students:4
 

Warning: the registration to the PTO can be canceled only by supervisor.
Responsible person: Petr Pošík